Waymo Reveals 5nm Custom ASIC With Over 1,000 TOPS for Autonomous Driving

Waymo gives its first detailed look at the compute behind the Driver

Waymo published a detailed look at its autonomous-driving compute architecture on August 20, 2026, including a purpose-built 5nm ASIC designed to process raw lidar, radar and camera data in real time.

Waymo says the custom chip delivers more than 1,000 TOPS of machine-learning performance for front-end processing and ML models. The company describes it as one specialized component inside a broader heterogeneous in-vehicle system rather than a standalone general-purpose AI accelerator.

This is a technical disclosure of deployed Waymo compute technology, not the launch of a merchant chip that developers can buy separately.

The ASIC is built around sensor processing and fusion

Autonomous vehicles must continuously ingest high-bandwidth data from multiple sensors and turn that information into driving decisions within milliseconds. Waymo says its ASIC includes specialized accelerators for raw lidar, radar and camera streams, including temporal denoising intended to improve low-light perception.

The processed data feeds a purpose-built inference engine that runs sensor-fusion machine-learning models. Waymo says co-designing silicon, sensors and algorithms allows it to optimize bandwidth, quantization and model execution for the specific low-batch, real-time workload inside a robotaxi.

The company also says its latest system can process high-fidelity input from 13 high-resolution cameras simultaneously and in real time. These are Waymo-reported architecture and performance claims, not independent benchmark results.

Waymo says onboard compute has scaled 20× in eight years

Waymo reports that the raw compute available to the Waymo Driver has increased by roughly 20× over eight years. But the company emphasizes that total system performance depends on more than peak operations per second.

Its compute architecture is designed around three requirements: low latency, rugged operation and redundancy. Waymo says the entire autonomous-driving decision loop runs onboard rather than relying on a remote cloud connection for moment-to-moment control.

The hardware is also integrated with the vehicle's liquid-cooling system so it can sustain performance under vibration, shock and extreme temperatures.

Redundancy is designed into the compute system

Because a fully autonomous Waymo vehicle does not depend on a human driver taking over, the company says its compute system is designed like two independent engines. They normally operate together on parallel workloads, while either side can take over if the other experiences a fault.

That redundancy requirement makes autonomous-driving compute different from many consumer or data-center AI workloads, where a transient hardware failure can often be handled by restarting or moving a job. In a moving vehicle, the system must continue operating safely in real time.

Waymo still uses major external semiconductor partners

Custom silicon does not mean Waymo is replacing every outside chip supplier. The company says its system combines in-house components with CPUs, GPUs, accelerators, memory and storage technologies from partners including AMD, Micron, NVIDIA, Samsung, SanDisk, Socionext and TSMC.

The architecture is therefore best understood as a heterogeneous stack: Waymo designs specialized silicon where the workload benefits from tighter co-optimization, while using external components elsewhere in the system.

Why this matters for physical AI and edge inference

Many frontier AI systems are optimized for large batches in data centers. Autonomous driving has a different set of constraints: models must run locally, respond within milliseconds, operate within a vehicle's power and thermal envelope and continue functioning through hardware faults.

Waymo's 5nm ASIC is an example of how physical-AI companies are moving toward application-specific inference hardware rather than relying entirely on general-purpose accelerators. The design also illustrates why achieved latency, sensor bandwidth and reliability can matter as much as headline TOPS.

What Waymo has revealed versus what remains undisclosed

Confirmed by Waymo: a purpose-built 5nm ASIC is part of its autonomous-driving compute stack; the chip delivers more than 1,000 TOPS for front-end and ML workloads; the latest system processes data from 13 high-resolution cameras; and Waymo has increased Driver compute by roughly 20× over eight years.

Not disclosed: unit volumes, manufacturing economics, exact die specifications, power consumption, detailed model throughput, supplier contract sizes or plans to sell the ASIC outside Waymo.

The disclosure matters because it shows a mature physical-AI operator building custom silicon around the real-time constraints of deployed autonomy rather than adapting a generic AI server architecture to the road.