Overview
Inria is recruiting an FPGA Design Engineer in Rennes for a 12-month fixed-term research-engineering position.
Full job description
The official Inria vacancy is reference 2026-10314 within the TARAN team at the Inria Centre at the University of Rennes. The posting requires a graduate degree or equivalent and centers on FPGA and digital hardware design. Gross monthly remuneration starts from EUR 2,695 according to diploma and experience; the position starts November 1, 2026 and closes September 30, 2026.
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Verification notes
Verified against the current authoritative or employer-authorized vacancy page on 2026-08-31; title, organization, France location, current application route and stated deadline where present were checked. Unsupported salary, sponsorship, visa, benefits or qualification facts are not asserted.
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