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Packaging Engineer

Responsibilities will include adapting industry standard packaging processes and materials to the unique requirements of quantum devices. Thermal, structural, and thermo-mechanical simulations for quantum packaging hardware, inclu...

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Microsoft Redmond, WA,US, US Source published Sep 23, 2026 Verified 1 hour ago
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Packaging Engineer opportunity at Microsoft
DeadlineMon Mar 22 1:23 AM 2027
EmploymentF U L L T I M E
CountryUS

Overview

Responsibilities will include adapting industry standard packaging processes and materials to the unique requirements of quantum devices. Thermal, structural, and thermo-mechanical simulations for quantum packaging hardware, including substrates, interposers, chip attach, cryogenic fridge components, and supporting cryogenic structures. Develop simulations that span hand calculations, reduced-order models, and full finite-element analysis (FEA) depending on fidelity and program needs. Structural and thermo-mechanical simulations to assess CTE mismatch, interfacial stress, warpage, and deformation across thermal cycles. packaging reliability assessments, including risks associated with flip-chip attach, solder joints, substrate bonding, and PCB interfaces. Generate and maintain reusable simulation templates, material libraries, and modeling workflows to improve consistency and efficiency

Full job description

Full Job Description

Responsibilities will include adapting industry standard packaging processes and materials to the unique requirements of quantum devices. Thermal, structural, and thermo-mechanical simulations for quantum packaging hardware, including substrates, interposers, chip attach, cryogenic fridge components, and supporting cryogenic structures. Develop simulations that span hand calculations, reduced-order models, and full finite-element analysis (FEA) depending on fidelity and program needs. Structural and thermo-mechanical simulations to assess CTE mismatch, interfacial stress, warpage, and deformation across thermal cycles. packaging reliability assessments, including risks associated with flip-chip attach, solder joints, substrate bonding, and PCB interfaces. Generate and maintain reusable simulation templates, material libraries, and modeling workflows to improve consistency and efficiency across the packaging team. Work in teams or independently as required. Embody our Culture and Values Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 3+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 5+ years technical engineering experience Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation). Doctorate in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 8+ years technical engineering experience OR equivalent experience Experience with cryogenic or extreme-environment hardware (cryogenic, vacuum, low-vibration, or high-precision systems). Proficiency with FEA tools such as ANSYS, COMSOL, Abacus, or equivalent, including model setup, meshing strategies, and convergence assessment Familiarity with advanced packaging technologies (flip chip, substrates, interposers, solder joints, PCB attach). Experience correlating simulation with cryogenic test data and iterating models based on measurement feedback. Strong fundamentals in heat transfer, solid mechanics, and numerical methods. Demonstrated ability to translate ambiguous design questions into well-scoped simulation problems and actionable outputs.

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