Overview
Lead DFT strategy and execution across multiple projects, ensuring alignment with overall chip design goals. Define and implement DFT architecture, including scan insertion, boundary scan, MBIST, and JTAG. Collaborate with RTL, physical design, and verification teams to integrate DFT features seamlessly. Manage ATPG and pattern generation, ensuring high fault coverage and test efficiency. Oversee post-silicon bring-up and debug, including test program development and failure analysis. Drive tool and flow development for DFT automation and optimization. Ensure compliance with manufacturing test requirements, including support for ATE platforms. Mentor and guide DFT engineers, fostering technical growth and best practices. Track project milestones and deliverables, reporting status and risks to leadership. Evaluate emerging DFT methodologies and tools, recommending improvements to enhance
Full job description
Full Job Description
Lead DFT strategy and execution across multiple projects, ensuring alignment with overall chip design goals. Define and implement DFT architecture, including scan insertion, boundary scan, MBIST, and JTAG. Collaborate with RTL, physical design, and verification teams to integrate DFT features seamlessly. Manage ATPG and pattern generation, ensuring high fault coverage and test efficiency. Oversee post-silicon bring-up and debug, including test program development and failure analysis. Drive tool and flow development for DFT automation and optimization. Ensure compliance with manufacturing test requirements, including support for ATE platforms. Mentor and guide DFT engineers, fostering technical growth and best practices. Track project milestones and deliverables, reporting status and risks to leadership. Evaluate emerging DFT methodologies and tools, recommending improvements to enhance test quality and productivity. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. Experienced debug skills for RTL and gate level simulations Experience in DFT scan insertion and or Custom Memory BIST design and verification. Experience with Siemens DFT tools.
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