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Senior Hardware Engineer-Interconnection

Understand customer requirements and high-level architectural design, evaluate interconnect solutions available in the market, responsible for developing detailed specifications. Specify mechanical and electrical requirements for...

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Microsoft New Taipei City,TW, TW Source published Sep 14, 2026 Verified 6 hours ago
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Senior Hardware Engineer-Interconnection opportunity at Microsoft
DeadlineSat Mar 13 7:32 AM 2027
EmploymentF U L L T I M E
CountryTW

Overview

Understand customer requirements and high-level architectural design, evaluate interconnect solutions available in the market, responsible for developing detailed specifications. Specify mechanical and electrical requirements for high-speed interconnects. Collaborate with cross-functional teams (EE, ME, SI/PI, system architecture) to ensure co-design alignment. Balance innovation with manufacturability, cost, and reliability to deliver robust, scalable solutions. Lead or support design reviews, signal integrity (SI) and mechanical simulations, and prototyping. Evaluate and select suppliers for connectors and cables. Drive technical alignment and qualification with vendors, including DFM/DFT/DFR considerations. Define test and inspection criteria for interconnect components. Ensure compliance with reliability standards and environmental requirements. Support root cause analysis and contin

Full job description

Full Job Description

Understand customer requirements and high-level architectural design, evaluate interconnect solutions available in the market, responsible for developing detailed specifications. Specify mechanical and electrical requirements for high-speed interconnects. Collaborate with cross-functional teams (EE, ME, SI/PI, system architecture) to ensure co-design alignment. Balance innovation with manufacturability, cost, and reliability to deliver robust, scalable solutions. Lead or support design reviews, signal integrity (SI) and mechanical simulations, and prototyping. Evaluate and select suppliers for connectors and cables. Drive technical alignment and qualification with vendors, including DFM/DFT/DFR considerations. Define test and inspection criteria for interconnect components. Ensure compliance with reliability standards and environmental requirements. Support root cause analysis and continuous improvement for field and production issues. Work with partner teams to create system level bring-up and end-to-end validation test plans, ensure complete coverage, guarantee execution. Develop and maintain design guides, specifications, and recommended practices. Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 3+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 5+ years technical engineering experience OR equivalent experience. 5+ years' experience in high-speed interconnection products development and/or projects execution. 5+ years' experience in system level high-speed design and implementation (connector, cable, backplane and/or mid-plane) across the hardware development lifecycle. 5+ years' experience working across multiple disciplines (electrical, mechanical, thermal, manufacturing, system/rack integration, and/or data center infrastructure) to identify risks, drive discussions, detail system tradeoffs, and assess impact. Fundamental knowledge of the following hardware design principles: Computer Architecture, Electrical Engineering, Power Design, Signal Integrity. Experience executing hardware validation and functional test plans. Hands-on using VNA, high-speed scopes, bus protocol analyzer, logic analyzers, etc.. Experience working across disciplines and organizations. Demonstrated verbal and written communication and presentation skills. Deep understanding of connector mechanics, cable assembly, and SI/ME tradeoffs. Knowledge of blind-mate connector systems, floating connector designs, and cable backplane architectures. Familiarity with AI infrastructure, hyperscale systems, or data center hardware. Experience with PCIe Gen7 and/or 112G/224G PAM4 signaling and associated SI/PI challenges. Exposure to reliability testing (HALT/HASS), failure analysis, and quality control systems. Experience debugging board and system level issues for Cloud Servers. Proficiency in simulation tools (HFSS, CST, SIwave) and mechanical CAD (Creo, SolidWorks).

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