Overview
The candidate for this position will be expected and able to complete the following responsibilities: Drive end-to-end execution from synthesis through place-and-route for large designs, ensuring completion of all signoff stages including timing, physical verification, EMIR, formal equivalence, and low-power verification. Responsible for SOC clocks and driving high speed clock construction and CTS. Drive methodology exploration activities to optimize SOC blocks for clock construction and related methodology. Coordinate with CAD, RTL/Design teams/DFT, Architecture team, Power & Performance team, Technology team & other internal/external partners as essential. Responsible for RTL to GDS implementation in Physical Design domain. Influence design tools, flows, and methodologies in construction, signoff, and optimization through a data-driven approach. Demonstrate technical expertise across v
Full job description
Full Job Description
The candidate for this position will be expected and able to complete the following responsibilities: Drive end-to-end execution from synthesis through place-and-route for large designs, ensuring completion of all signoff stages including timing, physical verification, EMIR, formal equivalence, and low-power verification. Responsible for SOC clocks and driving high speed clock construction and CTS. Drive methodology exploration activities to optimize SOC blocks for clock construction and related methodology. Coordinate with CAD, RTL/Design teams/DFT, Architecture team, Power & Performance team, Technology team & other internal/external partners as essential. Responsible for RTL to GDS implementation in Physical Design domain. Influence design tools, flows, and methodologies in construction, signoff, and optimization through a data-driven approach. Demonstrate technical expertise across various domains of Physical Design. Clear communications on project status & planning. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. Min 7+ years of experience in semiconductor design BS/MS in Electrical or Computer Engineering or any related degree Proven track record in Physical Design domain implementing designs through synthesis, floorplanning, place and route, extraction, timing, and physical verification. Communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams. Production silicon tape-outs experience in advanced foundry process nodes. Experience in low power design methodology for SOC Thorough understanding of SOC or subsystem design trade-offs across power, performance, and area (PPA). Familiarity with various clock construction strategies for high speed designs Demonstrate technical expertise in all aspects of Physical Design, from synthesis to place and route of partitions through all signoff including timing signoff, physical verification, EMIR signoff, Formal Equivalence, and Low Power Verification. Own complete PD execution of medium to large-size SOC block. Be fully hands-on in technical domain ownerships as individual contributor and collaborate cross-team as required. Partner closely with PD flow/CAD team and PD methodology team to flag & fix PD TFM issues Problem-solving and data analysis skills Ability to communicate effectively with cross-functional teams
Tips for this job
Practical JobOpportunity guidance. These tips do not replace official rules or create new eligibility requirements.
- Tailor the CV and application to the responsibilities and required skills stated on the official employer page.
- Use concrete evidence of relevant work, projects and measurable results rather than generic claims.
- Confirm location, work authorization, remote restrictions and sponsorship terms before applying.
- Apply through the original employer or official recruitment destination shown on this page.
Verification notes
Verified from public schema.org JobPosting structured data on the official source page. The complete published description, responsibilities, requirements and benefits were normalized when present; unstated facts were not inferred.
JobOpportunity is the discovery and verification layer. Confirm eligibility, dates, salary/funding and application instructions on the original source before submitting anything.
Apply through JobOpportunity →Browse current JobOpportunity listings from Microsoft Careers →
