Senior Signal Integrity Engineer

This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Senior Signal Integrity Engineer based in Canada. This is a senior engineering opportunity focused on advancing signal and power integrity solutions for next-generation, high-speed digital interfaces. You will work on advanced hardware systems supporting digital links operating at speeds of up to 448Gbps , combining electromagnetic simulation expertise with practical PCB design knowledge. The role involves analyzing cutting-edge PAM4 and NRZ interfaces, validating simulation results against real-world measurements, and developing robust design practices. You will collaborate closely with PCB layout engineers to optimize signal and power integrity across server, data center, and networking platforms. Your work will directly contribute to the reliability and performance of sophisticated electronic systems. The position also offers an opportunity to influence engineering standards through technical documentation, design guidelines, and best-practice development.

Conduct high-frequency electromagnetic simulations for next-generation 224Gbps and 448Gbps interfaces using tools such as Ansys HFSS and Keysight ADS . Perform detailed Power Delivery Network (PDN) analysis using industry-standard simulation tools. Analyze and validate high-speed digital links using PAM4 at 56Gbps and 112Gbps and NRZ at 25Gbps or higher , including eye diagrams, jitter, noise, and S-parameter analysis. Correlate simulation results with measurement data to validate models, identify discrepancies, and improve design accuracy. Develop, implement, and document best practices covering impedance control, transmission line design, PCB stack-ups, and practical PCB manufacturing constraints . Create precise technical documentation covering simulation methodologies, findings, recommendations, and design considerations throughout the hardware development lifecycle. Apply knowledge of high-speed Ethernet standards , including 25G, 100G, 400G, and 800G, to simulation and signal integrity analysis. Collaborate with PCB layout engineers to evaluate and optimize board designs for signal and power integrity across server, data center, and networking hardware. Contribute to actionable design guidelines for ultra-high-speed interconnects and advanced electronic systems. Requirements Minimum 5 years of direct, hands-on experience performing signal integrity simulations for high-speed digital systems. Demonstrated proficiency with Ansys HFSS, Cadence Sigrity, PowerSI, Ansys SIwave, and Keysight ADS . Strong expertise in high-speed digital interfaces, including PAM4 at 56Gbps and 112Gbps and NRZ at 25Gbps or higher . Extensive knowledge of signal integrity and power integrity methodologies , PCB stack-up optimization, impedance control, transmission lines, and PCB fabrication/process constraints. Strong understanding of electromagnetic simulation and high-speed interconnect analysis. Excellent organizational skills and the ability to produce clear, comprehensive, and technically precise documentation. A Master’s degree in Electrical Engineering, Physics, Mathematics, or a related technical discipline , or equivalent professional experience, is preferred. 8+ years of experience conducting end-to-end signal and power integrity analysis for high-performance electronic hardware is preferred. Experience creating comprehensive design guidelines for ultra-high-speed interconnects and electronic systems is preferred. Experience working directly with PCB fabrication vendors to implement and validate complex impedance-controlled board designs is preferred. Strong collaboration and communication skills, particularly when working across engineering and hardware development teams. Benefits Remote work from Canada. Competitive compensation and benefits , as stated in the original posting for the regions in which the organization operates. The source posting does not specify a Canada-specific benefits package; therefore, details such as medical, dental, retirement, or paid-time-off benefits should be confirmed during the hiring process.

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