Senior Silicon Design Engineer

Full Job Description

The candidate for this position will be expected and able to complete the following responsibilities: Own development of custom IPs RTL from microarchitecture to RTL implementation, verification, and post-silicon validation. Collaborate with architecture, SoC, firmware, verification, and physical design teams to deliver high-quality IP solutions. Develop high-performance, power-efficient RTL designs and drive PPA optimization across the design lifecycle. Lead design signoff activities including CDC, RDC, LINT, synthesis, STA, and timing closure. Design leading edge hardware algorithms to provide hardware acceleration of key data processing operations. Drive pre-silicon and post-silicon debug, silicon bring-up, and root-cause analysis of complex system issues. Mentor engineers and champion design excellence through reviews, automation, and continuous methodology improvements. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. These requirements include, but are not limited to, the following specialized security screenings: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. 3+ years experience in digital logic design in SystemVerilog/Verilog/VHDL 3+ years experience running synthesis/static check tools including RTL synthesis, lint, CDC, RDC, and/or LEC Proficient expertise in digital design, microarchitecture specification development, and synthesizable RTL implementation. Ability to read and write code in Python, Perl, C/C++, C#, or related language Experience developing and optimizing high-speed CMOS designs, including power, performance, and area tradeoff analysis. Proficient debugging, problem-solving, and cross-functional collaboration skills throughout the IP development lifecycle. Proficient knowledge of industry-standard interconnect protocols, including AMBA AXI. Experience with synthesis, floorplanning, static timing analysis, timing closure, and collaboration with physical design teams. Proficient written and verbal communication skills, with the ability to work independently and collaborate effectively across teams.

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