Senior System Validation Engineer

Full Job Description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Senior System Validation Engineer

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ technologies with the company’s COSMOS software suite to enable scalable, high-performance AI infrastructure. Discover more at www.asteralabs.com.

Overview:

Astera Labs is seeking a motivated Senior System Validation Engineer to join our growing post-silicon validation team in Israel and support next-generation connectivity products for AI and data-center applications.

In this role, you will perform system-level post-silicon validation, characterization, and debug across silicon, hardware, firmware, and software. You will support silicon bring-up and PVT/corner testing, develop and execute functional and system validation tests, analyze results, and work with cross-functional teams to identify and resolve complex system issues.

This is a highly hands-on lab position. The primary location is Haifa, with temporary support at the Ramat Gan lab as needed.

Key Responsibilities:

Develop and execute post-silicon functional and system validation from silicon bring-up through production readiness.

Run PVT, silicon corner, stress, characterization, and qualification testing across a wide range of operating conditions.

Develop validation tests to verify functionality, performance, stability, power, and operating margins.

Debug issues across silicon, hardware, firmware, drivers, and system software.

Validate high-speed interfaces such as PCIe, CXL, Ethernet/SerDes, and DDR, as well as common system interfaces.

Develop Python scripts and automation to improve validation coverage, regression, and test efficiency.

Analyze validation data, identify issues and trends, and drive problems to root cause and closure.

Work closely with hardware, architecture, firmware, software, design, and DV teams to investigate and resolve issues.

Support the transition of new silicon from initial bring-up to a qualified, production-ready product.

Operate system platforms and laboratory equipment to support validation and debug.

Document test results, issues, root cause, and recommendations and communicate findings clearly.

Basic Qualifications:

B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

6+ years of experience in post-silicon, system, hardware, or product validation.

Hands-on experience with SoC/silicon bring-up, functional validation, and system-level debug.

Experience developing and executing validation plans, test cases, and characterization experiments.

Strong Python scripting and test automation skills.

Strong hardware debugging, analytical, and problem-solving skills with the ability to work independently.

Experience debugging issues across hardware, firmware, and software.

Experience validating high-speed interfaces such as PCIe, Ethernet, SerDes, CXL, or DDR.

Hands-on experience working in a hardware or system validation laboratory.

Strong communication and cross-functional collaboration skills.

Preferred Qualifications:

Experience with PVT validation, silicon corner testing, characterization, qualification, and margin analysis.

Experience with server, storage, networking, or AI infrastructure products.

Familiarity with PCIe/CXL architecture and high-speed SerDes technologies.

Experience with oscilloscopes, BERTs, protocol analyzers, traffic generators, or similar lab equipment.

Working knowledge of Python, firmware, Linux, and system-level software debugging.

Experience developing automated validation and regression environments.

Familiarity with Git and software development practices.

Experience with pre-silicon validation, emulation, or hardware prototyping.

Experience with system performance, throughput, latency, power, and stability testing.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

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