Source-listed Job

Signal and Power Integrity Engineer

The candidate for this position will be expected and able to complete the following responsibilities: SIPI engineer for compute and AI SoCs and platforms - Implement strategies for end-to-end power delivery design and signal integ...

Job Source description available
Microsoft Raleigh, NC,US, US Source published Oct 8, 2026 Source retrieved Oct 19, 2026
Source: Microsoft Opportunities · A retrieval date records when our system last obtained the source record. It does not guarantee the vacancy is still open or that every detail has been independently checked.
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Signal and Power Integrity Engineer opportunity at Microsoft
DeadlineTue Apr 6 10:46 PM 2027
EmploymentF U L L T I M E
CountryUS

Overview

The candidate for this position will be expected and able to complete the following responsibilities: SIPI engineer for compute and AI SoCs and platforms - Implement strategies for end-to-end power delivery design and signal integrity design from Silicon to Package, and linking to Platform to System and Cloud. Deliver SIPI solutions that meet the HPC demands across the entire system. Drive future power and signal integrity solutions for chiplet architecture with advanced packaging and advanced silicon nodes. Design, model, and simulate SI and PI (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance. Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to va

Full job description

Full Job Description

The candidate for this position will be expected and able to complete the following responsibilities: SIPI engineer for compute and AI SoCs and platforms - Implement strategies for end-to-end power delivery design and signal integrity design from Silicon to Package, and linking to Platform to System and Cloud. Deliver SIPI solutions that meet the HPC demands across the entire system. Drive future power and signal integrity solutions for chiplet architecture with advanced packaging and advanced silicon nodes. Design, model, and simulate SI and PI (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance. Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon. Work closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers. Drives the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines. Drives engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs. Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. MS degree with minimum 3+ years of experience in silicon/package/system signal integrity and power delivery. BSEE degree with minimum 5 years' experience in silicon/package/system signal integrity and power delivery. Good foundation in the field of Signal and Power Integrity and delivery, System design, IP design with knowledge on product development with minimum 5 years' experience in design and electrical modelling. Good working knowledge in the field of end to end system SIPI Design and Architecture. Industry knowledge, trends and landscape of technologies to drive development across Silicon-IP, Advanced packaging, Substrate technology, Board technology and Platform design. Effective interpersonal skills including written and verbal communication, teamwork, negotiation, and presentation.

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